This invention relates to a novel process for molding plastic housings onto a lead frame having a plurality of spaced semiconductor dies connected along its length and to a novel lead frame structure which improves the mold product. More particularly, the invention relates to a novel process and lead frame structure for the manufacture of semiconductor devices of the type shown in co-pending application Ser. No. 251,268, filed Apr. 6, 1981 in the name of Dennis Meddles entitled "Four Leaded Dual In-Line Package Module for Semiconductor Devices".
In order to form a relatively inexpensive package for semiconductor devices, it is common to use an elongated lead frame which has a plurality of identical groups of leads contained integrally within a common conductive strip. Semiconductor chips or dies are then soldered to one lead element of each group of leads along the length of the frame. Other electrical connections are made from the other lead frame elements of each group to the semiconductor chip terminals as desired. The entire lead frame with subassembled chip and wire leads is then placed between the halves of a transfer mold and plastic is injected into the mold cavities to form an encapsulated housing around each semiconductor device and its integral leads. The ends of the lead frame elements extend beyond the edge of the housing to allow electrical connection to the individual package.
The mold halves which are commonly used in this molding operation contain a small gate region. The gate region is an opening into the bottom mold half cavity which is disposed beneath the lead frame and which communicates with a runner which receives molten plastic under pressure which is to be transferred to the mold cavity. The gate region preferably has an area as small as possible so that after molding, the solidified plastic within the runner can be easily broken away from the side of the molded housing. Frequently, however, the gate area is so large that the package edge will chip during the breakout of the package from the runner since the runner is connected to the package over the large gate cross-section. The gate area is frequently large because, when the gate is made too small in area, the molten plastic moves at great speed through the gate as it fills the die cavity. The high-speed movement of the molding compound causes erosion or substantial wear of the gate so that the mold must be rebuilt or replaced frequently in order to restore the gate to a small size.
A further problem with prior art molding techniques is that the plastic entering the gate fills the die cavity from the bottom to the top. The ejector pins for ejecting the die from the completed mold are located within the bottom mold half. Therefore, as plastic is admitted into the bottom half of the mold, the air leakage path which surrounds the ejector pin is quickly closed. As the die fills with molten plastic from bottom to top, air within the mold is captured and is compressed against the top surface of the mold. This captured air frequently produces bubbles or irregularities in the upper surface of the molded part.
Thus, the prior art techniques for molding small plastic semiconductor device packages has a large reject rate, as high as 20 to 30%, due to chipping of the package in the area of the gate; bubbles in the upper surface of the device caused by air which is trapped in the mold cavity as the cavity is filled with plastic; and rapid gate wear due to fast moving plastic through the narrow gate region.